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NXP Semiconductors /LPC408x_7x /GPIO /CLR5

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Interpret as CLR5

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PCLR0)PCLR0 0 (PCLR1)PCLR1 0 (PCLR2)PCLR2 0 (PCLR3)PCLR3 0 (PCLR4)PCLR4 0 (PCLR5)PCLR5 0 (PCLR6)PCLR6 0 (PCLR7)PCLR7 0 (PCLR8)PCLR8 0 (PCLR9)PCLR9 0 (PCLR10)PCLR10 0 (PCLR11)PCLR11 0 (PCLR12)PCLR12 0 (PCLR13)PCLR13 0 (PCLR14)PCLR14 0 (PCLR15)PCLR15 0 (PCLR16)PCLR16 0 (PCLR17)PCLR17 0 (PCLR18)PCLR18 0 (PCLR19)PCLR19 0 (PCLR20)PCLR20 0 (PCLR21)PCLR21 0 (PCLR22)PCLR22 0 (PCLR23)PCLR23 0 (PCLR24)PCLR24 0 (PCLR25)PCLR25 0 (PCLR26)PCLR26 0 (PCLR27)PCLR27 0 (PCLR28)PCLR28 0 (PCLR29)PCLR29 0 (PCLR30)PCLR30 0 (PCLR31)PCLR31

Description

Port Output Clear register using MASK.

Fields

PCLR0

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR1

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR2

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR3

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR4

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR5

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR6

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR7

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR8

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR9

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR10

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR11

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR12

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR13

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR14

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR15

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR16

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR17

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR18

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR19

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR20

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR21

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR22

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR23

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR24

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR25

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR26

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR27

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR28

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR29

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR30

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.
PCLR31

Fast GPIO output value Clear bits. Bit 0 in xCLR controls pin Px[0], bit 31 controls pin Px[31]. 0 = Controlled pin output is unchanged. 1 = Controlled pin output is set to LOW.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data